Encrypted download of SRAM-based FPGAS

ABSTRACT

Method and apparatus is provided for securely configuring a programmable hardware device from a remote source. The programmable hardware device includes a plurality of programmable logic modules. A host receives configuration information from the remote source, where the configuration information defines a function of the programmable logic modules. The host encrypts the configuration information according to a cryptographic algorithm. The encrypted information is transferred to a special download engine at the programmable hardware device, which decrypts the information according to the same cryptographic algorithm. The programmable logic modules are thus configured by the decrypted configuration information, which has been securely downloaded from the remote source.

REFERENCE TO PRIOR APPLICATION

[0001] This application is a Continuation of U.S. application Ser. No.09/212,003 filed Dec. 14, 1998, entitled “Encrypted Download ofSRAM-Based FPGAS,” which application is incorporated herein byreference.

BACKGROUND OF THE INVENTION

[0002] This invention relates to programmable hardware devices and moreparticularly to an apparatus and method of securely configuringprogrammable hardware devices that are reprogrammed when powered up.

[0003] Programmable hardware devices are general-purpose, combinationalor sequential digital components that can be programmed to perform acertain function. They are also referred to as programmable logicdevices (PLDs) or programmable arrays, and part of their basic structureincludes a matrix of programmable logic modules or switches that can beconfigured to implement a complex circuit that performs a certainfunction. The programmable logic modules can consist of nodes of fuses,antifuses, floating-gate metal oxide semiconductor (MOS) transistors,random access memory (RAM) cells, or static RAM (SRAM) cells.

[0004] Fuse and antifuse based programmable hardware devices arephysically programmed by having the fuse nodes “blown” into apermanently on or off state. Floating gate, or flash, memory cells arenonvolatile and remain electrically programmed until erased. RAM basedcells are volatile and must be electrically programmed each time theprogrammable hardware device is powered-up. Both flash and RAM basedcells are programmed by providing to the programmable hardware device adata stream of configuration information. The configuration informationdefines a function that each programmable logic module will perform, orcollectively defines the combinational function of the programmablehardware device. The configuration information is usually highlysensitive and proprietary information.

[0005] Programmable hardware devices can generally be classifiedaccording to one of two categories: one-time programmable; andreprogrammable. In the first category, the programmable logic modules ofthe device are programmed once, usually where the device ismanufactured, such as with fuse and antifuse based devices. Such devicesare permanently nonvolatile, meaning their configuration can not bechanged once the device is programmed. In the second category, theconfiguration information is stored first in an external source such asa memory. The configuration information is downloaded into the device toconfigure the logic modules. To reprogram the device, an existingconfiguration of the programmable logic blocks is deliberately erasedand another configuration is downloaded, such as with flash memory, orpower is simply removed and another configuration is downloaded uponpower-up, such as with RAM.

[0006] The present invention is directed to configuring programmablehardware devices of the second category. FIG. 1 shows a simplified blockdiagram of a prior art system 100 for configuring a reprogrammablehardware device 110 from an external host 130 or other external memorysource. The basic architecture of a programmable hardware device 110includes a matrix of programmable logic modules 120 surrounded by anaddressable interconnection network 135. Each logic module 120 may beany one of a variety of circuits capable of being programmed toimplement all logic functions having one or more inputs. Such circuitsinclude transistor-based registers, multiplexers, or look-up tables.Often, they also contain sequential elements such as flip-flops orlatches. In gate array technology, the interconnection pattern isdefined by metallization layers applied over a programmable logic modulepattern at the final stage of manufacture.

[0007] The interconnect network 135 is connected by input/output blocks(I/O) 145 to a configuration engine 140 that configures the logicmodules 120 according to configuration information, or a program,received from the host 130 via a communications channel 150. Theconfiguration engine contains a memory for storing the configurationinformation, which memory can be flash, such as erasable programmableread only memory (EPROM) and electrically erasable programmable ROM(EEPROM), or static RAM (SRAM). Host 130 may be a memory, a processorlinked to a memory, or connected to a memory in a data network such asthe internet. An example of a programmable hardware device as describedabove is described in greater detail in U.S. Pat. No. 5,744,980.

[0008] One problem that arises is that the communications channel 150between the host 130 or external memory source and the programmablehardware device 110 is particularly vulnerable to monitoring by anoutside “attacker”. By monitoring the download process of transferringconfiguration information from the host 150 to the programmable hardwaredevice 110, an undesirable entity could gain enough information toreconstruct a proprietary configuration for their own applications.Accordingly, there is need for a system and method to securely downloadconfiguration information into a programmable hardware device.

SUMMARY OF THE INVENTION

[0009] The present invention provides a method and apparatus to securelyconfigure a programmable hardware device to inhibit copying ofconfiguration information which defines a programmable function of thedevice. Secure configuration of a programmable hardware device isachieved in one embodiment of the invention by the steps of encryptingconfiguration information according to a cryptographic algorithm,transferring the encrypted configuration information from a host to theprogrammable hardware device, decrypting the configuration informationaccording to the same cryptographic algorithm, and configuring aplurality of programmable logic modules in the programmable hardwaredevice according to the configuration information.

[0010] In an alternate embodiment, the host receives the configurationinformation from an external memory source in encrypted form. The hostmay then store the encrypted configuration information for latertransfer to the programmable hardware device. In yet another embodiment,the host decrypts encrypted configuration information received from anexternal memory source. The host then again encrypts the configurationaccording to the same or a different cryptographic algorithm. The hosttransfers the again encrypted configuration information to theprogrammable hardware device.

[0011] In yet another embodiment, the present invention provides a noveldownload engine for programmable hardware devices. The download engineincludes a data-in register having a communications channel forreceiving encrypted configuration information from the external host, acryptographic engine, coupled to the data-in register and configured todecrypt the encrypted configuration information according to acryptographic algorithm, and an interface coupled to the cryptographicengine, for transferring the decrypted configuration information fromthe cryptographic engine to the programmable logic modules.

BRIEF DESCRIPTION OF THE DRAWINGS

[0012]FIG. 1 is a simplified block diagram of a prior art system forconfiguring a programmable hardware device.

[0013]FIG. 2 is a simplified block diagram of a system for securelyconfiguring a programmable hardware device according to an embodiment ofthe present invention.

[0014]FIG. 3 illustrates a download engine in a programmable hardwaredevice according to an embodiment of the present invention.

[0015]FIG. 4 illustrates a host processor for providing encryptedconfiguration information to the programmable hardware device.

[0016]FIG. 5 is a flowchart of an embodiment of the present inventionfor securely configuring a programmable hardware device.

DESCRIPTION OF THE SPECIFIC EMBODIMENTS

[0017] The figures and the accompanying description below are examplesof the preferred embodiment of the present invention and a fewvariations. A person of ordinary skill in the art will understand thatmany of the specific details of the embodiments shown here can be variedwithout departing from the novelty of the invention.

[0018] Referring now to FIG. 2, there is shown a simplified blockdiagram of one embodiment of a system 200 for securely configuring aprogrammable hardware device 110 according to the present invention.Programmable hardware device 110 has a download engine 210 providedbetween the communications channel 150 and the configuration engine 140of the programmable hardware device 110. Programmable hardware devicespresently available contain both mask programmable and fieldprogrammable logic modules. In a preferred embodiment, download engine210 is implemented in a mask programmable portion of a programmablehardware device as an application specific integrated circuit (ASIC).

[0019]FIG. 3 shows a more detailed view of an embodiment of a downloadengine 210 according to the present invention. As shown in FIG. 3,download engine 210 includes a data-in register 310, a cryptographicengine 330, and an interface 340. The data-in register 310 receivesencrypted data from the host via communications channel 150. Data-inregister can be a RAM bank of any size. As data-in register 310 fills upwith data, the data is passed to a cryptographic engine 330.Cryptographic engine 330 stores and executes a cryptographic algorithmsuch as Data Encryption Standard (DES) or 3DES, which are well knowncryptographic standards in the art. It should be understood that manyother cryptographic algorithms and schemes can be used in place of DESor 3DES. The cryptographic engine 330 executes the cryptographicalgorithm to decrypt encrypted data passed on from data-in register 310.Coupled to the output of the cryptographic engine is an interface 340 tothe configuration engine. Interface 340 stores the decryptedconfiguration information into a format suitable for the configurationengine 140 to receive and load into the programmable logic modules 120.

[0020] In a preferred embodiment, the download engine 210 will have akey store 320 consisting of nonvolatile or battery-backed memory thatstores a cryptographic key. A cryptographic key is a secret value and isa function of the cryptographic algorithm utilized by the cryptographicengine 330. For the decryption operation to execute, the properdecryption key must be used. Therefore, the key represents the securityof any cryptographic system, and for the present invention it ispreferably stored in a memory separate and apart from the cryptographicengine but within the same security envelope or secured geographicalarea. It should also be evident to one skilled in the art that the keystore 320 could be external to the download engine 210 and coupled tothe download engine by another communications channel. In yet anotherembodiment of the present invention, the download engine 210 may executea key exchange with whichever cryptographic engine encrypted theconfiguration information. For example, key store 320 may be implementedin a public key algorithm where the key is passed to key store 320 by apublic key exchange.

[0021] In some architectures, it may be desirable to control the timingand command of the data-in register, the cryptographic engine, and theinterface. FIG. 3 shows a state machine controller 350 coupled todata-in register 310, the cryptographic engine 330, and the interface340 to provide timing and control commands and signals. State machinecontroller 350 may also be in communication with the host via datachannel 155 for exchanging command, timing and synchronization signalssuch as interrupts.

[0022]FIG. 4 illustrates a host according to one embodiment of thepresent invention. Host 130 receives configuration information from anexternal memory source, which can include a remote memory in a computerworkstation, or part of a network such as the internet or a local areanetwork (LAN). Host 130 includes a first memory 410, a cryptographicengine 420 preferably coupled to a separate key store 430, and a secondmemory 440 coupled between the output of cryptographic engine 420 andthe communication channel 150.

[0023] The configuration information received by first memory 410 may beeither encrypted or unencrypted. Encrypted information is known ascyphertext non-encrypted information is known as plaintext. If firstmemory 410 receives the configuration information as cyphertext, it willeither pass it on to second memory 440 without further cryptographicprocessing, or pass it on to cryptographic engine 420 for decryption andreencryption. Decryption will be accomplished according to thecryptographic algorithm and key employed by the external memory sourceto encrypt the configuration information. Encryption may be accomplishedusing the same algorithm or a different algorithm, or using a differentcryptographic key. If first memory 410 receives the configurationinformation as plaintext, memory 410 passes it on to cryptographicengine 420 for encryption. In any case, second memory 440 is adapted toreceive, store, and transfer encrypted, or cyphertext, configurationinformation. It may also be desirable for the host 130 to include acontroller 450 to control the command and timing of the memories andcryptographic engine. Controller 450 can include a communicationschannel 455 to communicate command interrupts and synchronizationsignals to the download engine.

[0024]FIG. 5 shows a flowchart 500 of an embodiment of the presentinvention. At step 510, configuration information, defining aconfiguration for a target programmable hardware device, is transmittedto a host from an external source. The external source may be anotherhost, a ROM, a disk, or main memory in a computer. The external sourcemay also be a network on which the configuration information is storedin whole or parts. It should be recognized that the host may access theconfiguration information from the external source, or the externalsource may provide the configuration information to the host.

[0025] Upon being transmitted to the host, the host will determine ifthe configuration information received is encrypted, at step 515. If itis not, at step 520 the host will encrypt the configuration informationaccording to any industry standard or accepted cryptographic algorithm,such as DES, 3DES, or RC4, for example. If the configuration informationis encrypted, at step 525 the host will either decrypt it or store it atstep 535 for passing on to the programmable hardware device. The hostmay decrypt the configuration information if it receives theconfiguration information encrypted according to one encryptionalgorithm, perhaps as part of a network transfer protocol such as IPSEC,and it is instructed to transfer the configuration information to theprogrammable hardware device according to a second algorithm, such asany other industry standard algorithm. After decryption, the host willagain encrypt the configuration information at step 530 and then storeit at step 535.

[0026] A person of ordinary skill in the art would recognize that steps510-535 may also be performed as a manufacturing step if, for example,the host were to be simply a memory such as a programmable read-onlymemory (PROM). The PROM would be programmed, or burned in, with theconfiguration information during manufacturing of the PROM circuitboards.

[0027] Once stored, the encrypted configuration information istransferred to the programmable hardware device at step 540. Again, thetransfer may be initiated by either the host or the programmablehardware device. The programmable hardware device will decrypt theencrypted configuration information at step 545. At step 550, theprogrammable logic modules will be configured according to theconfiguration information, to implement the desired logic orfunctionality.

[0028] In summary, the preferred embodiments described above allow for anew method of downloading configuration information to a programmablehardware device. The methods and apparatus in support of those methodsallow for secure downloading of configuration information where theconfiguration information is provided to the programmable hardwaredevice in encrypted form and decrypted at the device according to acryptographic algorithm. This allows for securely configuring any typesof reprogrammable hardware logic devices from a remote configurationsource.

[0029] The above description is illustrative and not restrictive. Manyvariations of the invention will become apparent to those of skill inthe art upon review of this disclosure. The scope of the inventionshould, therefore, be determined not with reference to the abovedescription, but instead should be determined with reference to theappended claims along with their full scope of equivalents.

What is claimed is:
 1. A method of securely configuring a programmablehardware device from a host, wherein the programmable hardware deviceincludes a plurality of programmable logic modules, and the hostcontains configuration information defining a function of theprogrammable logic modules, the method comprising the steps of.encrypting configuration information according to a cryptographicalgorithm; transferring the encrypted configuration information from thehost to the programmable hardware device; decrypting the configurationinformation according to the same cryptographic algorithm; andconfiguring the programmable logic modules in the programmable hardwaredevice according to the decrypted configuration information.